Researcher: Prof. Prithviraj Banerjee,
As VLSI circuits become more complex, the computational requirements for performing various CAD tasks increase almost exponentially. It has become clear that new multiprocessor computers are required to solve the problems ahead.
The objectives of this research are to develop efficient parallel algorithms for VLSI CAD tasks that can utilize the computing power of a wide range of parallel platforms that are becoming available to the community, with the eventual goal of reducing the design turnaround time of complex chips of the future.
In this research we are investigating parallel algorithms for placement, routing, layout verification, logic synthesis, test generation, and fault simulation, and behavioral simulation. The parallel algorithms are designed such that they are portable across a range of parallel machines, including multiprocessor workstations, shared memory multiprocessors, message passing multiprocessors, and networks of workstations.
Most ProperCAD related research papers are accessible through the above links.
A concise listing of papers with full bibliographic entries is available in Postscript form as well as in BibTeX format.
We are achieving portability of our parallel CAD algorithms by developing our applications on top of the ProperCAD library which is a C++ object library targeted at medium-grain parallelism, and MIMD parallel architectures. The ProperCAD library has been ported to the following parallel machines: shared memory multiprocessors such as the Sequent Symmetry, Encore Multimax, SGI Challenge, SUN SPARCCenter 1000; distributed memory multicomputers such as Intel Paragon, IBM SP-2, Thinking Machines CM-5, and networks of workstations.
In this research we are investigating scalable, data partitioned parallel algorithms for placement, routing, layout verification, logic synthesis, test generation, and fault simulation, and behavioral simulation.
Specifically, we have already developed the following packages
In addition, we are also currently working on the following applications:
We are developing our parallel applications on top of distributed memory multicomputers such as the IBM SP-2, the Intel Paragon, and the Thinking Machines CM-5, shared memory multiprocessors such as the SUN SPARCserver 1000, the SGI Powerchallenge, and the HP/Convex Exemplar, and networks of SUN and HP workstations.
This work has been funded by the Advanced Research Projects Agency, by the National Science Foundation, and by the Semiconductor Research Corporation. We are working closely with several CAD companies such as Cadence, LSI Logic and Sierra Vista Corporation in transferring some of these parallel CAD tools to industry.