Parallel Simulation

Key Contributors

Research Papers

Actor Based Parallel VHDL Simulation Using Time Warp (94K)
Venkatram Krishnaswamy and Prithviraj Banerjee
to appear in Proceedings of the 1996 Workshop on Parallel and Distributed Simulation, Philadelphia, PA, May 1996

Design and Implementation of an Actor Based Parallel VHDL Simulator (168K)
Venkatram Krishnaswamy and Prithviraj Banerjee
Technical Report CRHC-96-04/UILU-ENG-96-2204, February 1996, Center for Reliable and High-Performance Computing, University of Illinois, Urbana, IL

Efficient Circuit Partitioning Algorithms for Parallel Logic Simulation (55K)
Srinivas Patil, Prithviraj Banerjee, and Constantine Polychronopolous
in Proceedings of Supercomputing '89, Las Vegas, NV, November 1989
send any questions to banerjee@ece.nwu.edu