Parallel Placement and Routing

Key Contributors

Research Papers

Distributed Object Oriented Data Structures and Algorithms for VLSI CAD (112K)
John A. Chandy, Steven Parkes, and Prithviraj Banerjee
in Proceedings of International Workshop on Parallel Algorithms for Irregularly Structured Problems, Santa Barbara, CA, August 1996

Parallel Algorithms for Standard Cell Placement Using Simulated Annealing (415K)
John A. Chandy
PhD dissertation, Department of Electrical Engineering, University of Illinois, July 1996, Technical Report CRHC-96-10/UILU-ENG-96-2216

A Parallel Hierarchical Algorithm for Module Placement Based on Sparse Linear Equations (60K)
Zhaoyun Xing and Prithviraj Banerjee
in Proceedings of the 1996 International Conference on Circuits and Systems, Atlanta, GA, May 1996

Parallel Simulated Annealing Strategies for VLSI Cell Placement (76K)
John A. Chandy and Prithviraj Banerjee
in Proceedings of the 1996 International Conference on VLSI Design, Bangalore, India, January 1996

ProperPLACE: A Portable Parallel Algorithm for Cell Placement (89K)
Sungho Kim, John A. Chandy, Steven Parkes, Balkrishna Ramkumar, and Prithviraj Banerjee
in Proceedings of the 1994 International Parallel Processing Symposium, Cancun, Mexico, April 1994

Improved Algorithms for Cell Placement and their Parallel Implementations
Sungho Kim
PhD dissertation, Department of Electrical Engineering, University of Illinois, July 1993, Technical Report CRHC-93-18/UILU-ENG-93-2231

PARAGRAPH: A Parallel Algorithm for Simultaneous Placement and Routing Using Heirarchy
Randall J. Brouwer and Prithviraj Banerjee
in Proceedings of the 1992 European Conference on Design Automation, Brussels, Belgium, March 1992

Parallel Algorithms for Placement and Routing in VLSI Design (212K)
Randall Jay Brouwer
PhD dissertation, Department of Electrical Engineering, University of Illinois, January 1991, Technical Report CRHC-91-02/UILU-ENG-91-2204

PHIGURE: A Parallel Hierarchical Global Router (37K)
Randall J. Brouwer and Prithviraj Banerjee
in Proceedings of the 1990 Design Automation Conference, Orlando, FL, June 1990

Parallel Simulated Annealing Algorithms for Standard Cell Placement on Hypercube Multiprocessors
Prithviraj Banerjee and Mark Howard Jones and Jeff S. Sargent
in IEEE Transactions on Computer Aided Design, January 1990

A Parallel Row-Based Algorithm for Standard Cell Placement with Integrated Error Control (29K)
Jeff Sargent and Prithviraj Banerjee
in Proceedings of the 1989 Design Automation Conference, Las Vegas, NV, June 1989

A Parallel Simulated Annealing Algorithm for Channel Routing on a Hypercube Multiprocessor
Randall J. Brouwer and Prithviraj Banerjee
in Proceedings of the 1988 International Conference on Computer Design, Rye Brook, NY, October 1988

A Parallel Row-Based Algorithm with Error Control for Standard-Cell Placement on a Hypercube Computer
Jeff Scott Sargent
MS thesis, Department of Electrical and Computer Engineering, University of Illinois at Urbana-Champaign, August 1988, Technical Report CSG-92/UILU-ENG-88-2259

Experiences with Serial and Parallel Algorihtms for Channel Routing Using Simulated Annealing (102K)
Randall Jay Brouwer
MS thesis, Department of Electrical and Computer Engineering, University of Illinois at Urbana-Champaign, February 1988, Technical Report CSG-84/UILU-ENG-88-2213

Performance of a Parallel Algorithm for Standard Cell Placement on the Intel Hypercube
Mark H. Jones and Prithviraj Banerjee
in Proceedings of the 1987 Design Automation Conference, Miami Beach, FL, June 1987

A Parallel Simulated Annealing Algorithm for Standard Cell Placement on a Hypercube Computer
Mark Howard Jones
MS thesis, Department of Electrical and Computer Engineering, University of Illinois at Urbana-Champaign, December 1986, Technical Report CSG-60/UILU-ENG-86-2241

A Parallel Simulated Annealing Algorithm for Standard Cell Placement on a Hypercube Computer
Prithviraj Banerjee and Mark H. Jones
in Digest of Papers, 1986 International Conference on Computer-Aided Design, November 1986

send any questions to banerjee@ece.nwu.edu