Parallel Layout Verification

Key Contributors

Research Papers

This is a listing of all ProperCAD research papers related to parallel layout verification including circuit extraction and design rule checking.

Parallel Algorithms for VLSI Layout Verification
Ky MacPherson and Prithviraj Banerjee
to appear in Journal of Parallel and Distributed Computing.

Integrating Task and Data Parallelism in an Irregular Application: A Case Study
Ky MacPherson and Prithviraj Banerjee
to appear in Proceedings of the Symposium on Parallel and Distributed Processing, New Orleans, LA, October 1996

Parallel Algorithms for Layout Verification (212K)
Ky MacPherson
MS thesis, Department of Electrical and Computer Engineering, University of Illinois at Urbana-Champaign, August 1995, Technical Report CRHC-95-18/UILU-ENG-95-2229

ProperEXT: A Portable Parallel Algorithm for VLSI Circuit Extraction
Balkrishna Ramkumar and Prithviraj Banerjee
expanded version of paper that appears in Proceedings of the 1993 International Parallel Processing Symposium

Parallel Algorithms for VLSI Circuit Extraction (107K)
Krishna P. Belkhale and Prithviraj Banerjee
in IEEE Transactions on Computer Aided Design, May 1991

Parallel Algorithms for CAD with Applications to Circuit Extraction (327K)
Krishna Prasad Belkhale
PhD dissertation, Department of Computer Science, University of Illinois, November 1990, Technical Report CRHC-90-15/UILU-ENG-90-2251

A Parallel Algorithm for Hierarchical Circuit Extraction (32K)
Krishna P. Belkhale and Prithviraj Banerjee
in Digest of Papers, 1990 International Conference on Computer-Aided Design, Santa Clara, CA, November 1990

PACE2: An Improved Parallel VLSI Extractor with Parametric Extraction (41K)
Krishna P. Belkhale and Prithviraj Banerjee
in Digest of Papers, 1989 International Conference on Computer-Aided Design, Santa Clara, CA, November 1989

PACE: A Parallel VLSI Circuit Extractor on the Intel Hypercube Multiprocessor
Krishna P. Belkhale and Prithviraj Banerjee
in Digest of Papers, 1988 International Conference on Computer-Aided Design, Santa Clara, CA, November 1988

Parallel Circuit Extraction on a Hypercube Multiprocessor
Anthony Dale Hagin
MS thesis, Department of Electrical and Computer Engineering, University of Illinois at Urbana-Champaign, May 1988, Technical Report CSG-89/UILU-ENG-88-2230
send any questions to banerjee@ece.nwu.edu