Senior Research Engineer
Qualcomm Inc., Bay Area Research and Development Center, Santa Clara, CA, Sept 2010-April 2012.
- Research on new hardware and software platforms for mobile devices.
Advanced Micro Devices, Computing Solutions Group, Boxborough, MA, Summer 2008-Spring 2010.
- Member of advanced development team working on an x86 dynamic binary optimizer.
- Develop instrumentation module for code regions, control-flow-based algorithm for finding region
patch points, and data-flow analysis module involving a combination of constant and value
Northwestern University, Department of Electrical Engineering and Computer Science, Evanston, IL, Fall 2007- Spring 2010.
- Involved in the ESP: Empathic Systems Project (PhD dissertation work)
- Explore novel methods of leveraging the perception, physiological traits, and activity of the end
user for characterizing and optimizing mobile computer architectures.
Google, Cluster Performance Analysis Group, Mountain View, CA, Summer 2007.
- Develop a profiling tool for using hardware performance monitoring and dynamic instrumentation
to study the cache miss behavior of dynamically allocated memory.
Intel Corporation, Dynamic Optimization Laboratory, Nashua, NH, Summer 2006-Fall 2006.
- Profile-directed dynamic memory allocation using allocation characteristics and
memory reference behavior to choose between specialized memory allocators.
IBM T.J. Watson Research Center, Programming Models and Tools for Scalable Systems, Yorktown Heights, NY, Summer 2005.
- Explored several methods of detecting locality in a sampled data reference stream for allocating data to large pages.
University of Colorado, Department of Electrical and Computer Engineering, Boulder, CO, Spring 2006, Spring 2007.
- Analysis of hardware performance monitoring data (MS Thesis work)
- Software-implemented fault tolerance