Check Input Resolution (Simulink Reference)

Check that the input signal has a specified resolution.

Library

Model Verification

Description

The Check Input Resolution block checks whether the input signal has a specified scalar or vector resolution (see Resolution). If the resolution is a scalar, the input signal must be a multiple of the resolution within a 10e-3 tolerance. If the resolution is a vector, the input signal must equal an element of the resolution vector. If the verification condition is true, the block does nothing. If not, the block halts the simulation, by default, and displays an error message.

The Check Input Resolution block and its companion blocks in the Model Verification library are intended to facilitate creation of self-validating models. For example, you can use model verification blocks to test that signals do not exceed specified limits during simulation. When you are satisfied that a model is correct, you can turn error-checking off by disabling the verification blocks. You do not have to physically remove them from the model. If you need to modify a model, you can temporarily turn the verification blocks back on to ensure that your changes do not break the model.

Data Type Support

The Check Input Resolution block accepts input signals of any dimensions and any built-in data type except int64 and uint64. If the input signal is nonscalar, the block checks the resolution of each element of the input test signal.

Parameters and Dialog Box

Resolution: Resolution that the input signal must have.
Enable Assertion: Unchecking this option disables the Assertion block, that is, causes the model to behave as if the Assertion block did not exist. The Advanced Pane of the Simulation Parameters dialog box allows you to enable or disable all Assertion blocks in a model regardless of the setting of this option.
Simulation callback when assertion fails: An M-expression to be evaluated when the assertion fails.
Stop simulation when assertion fails: If checked, this option causes the Assertion block to halt the simulation when the block's input is zero and display an error message in Simulink's Simulation Diagnostics viewer. Otherwise, the block displays a warning message in the MATLAB command window and continues the simulation.
Output Assertion Signal: If checked, this option causes the block to output a Boolean signal that is true (1) at each time step if the assertion succeeds and false (0) if the assertion fails. The data type of the output signal is boolean if you have selected the Boolean logic signals option on the Advanced pane of Simulink's Simulation Parameters dialog box. Otherwise the data type of the output signal is double.

Characteristics

Direct Feedthrough
No

Sample Time
Inherited from driving block

Scalar Expansion
No

Dimensionalized
Yes

Zero Crossing
No

Direct Feedthrough	No
Sample Time	Inherited from driving block
Scalar Expansion	No
Dimensionalized	Yes
Zero Crossing	No

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