Unit Delay Resettable External IC (Fixed-Point Blockset)

Fixed-Point Blockset

Unit Delay Resettable External IC

Delay a signal one sample period, with an external Boolean reset and initial condition

Library

Delays & Holds

Description

The Unit Delay Resettable External IC block delays a signal one sample period.

The block can reset its state based on an external reset signal R. The block has two input ports, one for the input signal u and the other for the reset signal R. When the reset signal is false, the block outputs the input signal delayed by one time step. When the reset signal is true, the block resets the current state to the initial condition given by the signal IC and outputs that state delayed by one time step.

The input u and initial condition IC must be the same data type, but can be any data type. The output is the same data type as the inputs u and IC. The reset R can be any data type.

You specify the time between samples with the Sample time parameter. A setting of -1 means the Sample time is inherited.

Parameters and Dialog Box

Sample time: Sample time.

Characteristics

Input Port u
Any data type supported by the blockset

Input Port R
Any data type supported by the blockset

Input Port IC
Same as the input u

Output Port
Same as the input u

Direct Feedthrough
No, of the input port
Yes, of the reset port
Yes, of the external IC port

Sample Time
Inherited

Scalar Expansion
Yes

Input Port `u`	Any data type supported by the blockset
Input Port `R`	Any data type supported by the blockset
Input Port `IC`	Same as the input `u`
Output Port	Same as the input `u`
Direct Feedthrough	No, of the input port Yes, of the reset port Yes, of the external `IC` port
Sample Time	Inherited
Scalar Expansion	Yes

Unit Delay Resettable Unit Delay With Preview Enabled