| Fixed-Point Blockset |
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Digital Controller Realization
In this simulation, the digital controller is implemented using the fixed-point direct-form realization shown below. The hardware target is a 16-bit processor. Variables and coefficients are generally represented using 16 bits, especially if these quantities are stored in ROM or global RAM. Use of 32-bit numbers is limited to temporary variables that exist briefly in CPU registers or in a stack.
The realization consists of these blocks:
- Up Cast is a Fixed-Point Blockset Conversion block that connects the A/D hardware with the digital controller. It pads the output word of the A/D hardware with trailing zeros to a 16-bit number (the base data type).
- Numerator Terms and Denominator Terms
- Each of these Fixed-Point Blockset FIR blocks represents a weighted sum carried out in the CPU target. The word size and precision used in the calculations reflect those of the accumulator. Numerator Terms multiplies and accumulates the most recent inputs with the FIR numerator coefficients. Denominator Terms multiples and accumulates the most recent delayed outputs with the FIR denominator coefficients. The coefficients are stored in ROM using the base data type. The most recent inputs are stored in global RAM using the base data type.
- Combine Terms is a Simulink or Fixed-Point Blockset Sum block that represents the accumulator in the CPU. Its word size and precision are twice that of the RAM (double bits).
- Down Cast is a Fixed-Point Blockset Conversion block that represents taking the number from the CPU and storing it in RAM. The word size and precision are reduced to half that of the accumulator when converted back to the base data type.
- Prev Out is a Simulink or Fixed-Point Blockset Unit Delay block that delays the feedback signal in memory by one sample period. The signals are stored in global RAM using the base data type.
| | Idealized Feedback Design | | Direct Form Realization | |