In this continuing grant from DARPA, we are entering our second year. The goals of the project are to investigate issues in adaptive computing architectures, configuration management techniques, compilation and mapping algorithms, and software algorithms optimized for adaptive computing systems using field-programmable gate-arrays. In the following year, we will perform the following research tasks.
We plan to test the performance of our Chimaera RFU after it comes back from fabrication. We also plan to create a complete emulation of the array plus the host processor, and use this as a demonstration vehicle for the entire project. We will extend our configuration management system by investigating multi-context architectures vs. partial run-time-reconfiguration, caching algorithms for FPGA-based system, defragmentation, and other techniques. We plan to complete the development of the basic GCC compiler for generating a combination of MIPS R3000 instructions and CHIMAERA RFUOP instructions. We will develop a library of parameterized firm macros for use in the creation of RFUOPs. These structures can allow for very quick compilation of adaptive programs, while still allowing for optimizations important to achieving efficient implementations. When combined with our floorplanning and placement techniques these will form the back-end for the Chimaera compilation system. We will also develop implementations of important image and signal processing algorithms, as well as commercial applications, on reconfigurable systems. These will demonstrate the potential of ACS to accelerate general-purpose applications, as well as the power of our Chimaera system.