 |
||||
 Home Curriculum VitaeResearchPublicationsTeachingMiscellaneous |
||||
Publications |
[DAC 10] Quantifying and Coping with Parametric Variations in 3D-Stacked Microarchitectures S. Ozdemir, Yan Pan, A. Das, G. Memik, G. Loh, A. Choudhary To appear in Design Automation Conference (DAC), Anaheim, CA, June 2010 (acceptance rate: 148/607 = 24.4%) [HPCA 10] FlexiShare: Energy-Efficient Nanophotonic Crossbar Architecture through Channel Sharing Yan Pan, J. Kim, G. Memik Int'l Symp. on High Performance Computer Architecture (HPCA), Bangalore, India, Jan. 2010 (acceptance rate: 32/175 = 18.3%) [PICA 09] Tuning Nanophotonic On-Chip Network Designs for Improving Memory Traffic Yan Pan, J. Kim, G. Memik Workshop on Photonic Interconnects & Computer Architecture (PICA) Held in Conjunction with 42nd Annual ACM/IEEE International Symposium on Microarchitecture, MICRO-42 New York, NY, Dec. 2009 [DAC 09] Selective Wordline Voltage Boosting for Caches to Manage Yield under Process Variations Yan Pan, J. Kong, S. Ozdemir, G. Memik, S. W. Chung Design Automation Conference (DAC), San Francisco, CA, Jul. 2009 (acceptance rate: 148/682 = 21.7%) [NOCS 09] Exploring Concentration and Channel Slicing in On-Chip Network Router P. Kumar, Yan Pan, J. Kim, G. Memik, A. Choudhary Int'l Symp. on Networks-on-Chip (NOCS), San Diego, CA, May. 2009 (full paper acceptance rate: 23/126 = 18.3%) [ISCA 09] [ppt] Firefly: Illuminating Future Network-on-Chip with Nanophotonics Yan Pan, P. Kumar, J. Kim, G. Memik, Y. Zhang, A. Choudhary Int'l Symp. on Computer Architecture (ISCA), Austin, TX, Jun. 2009 (acceptance rate: 43/210 = 20.5%) [MICRO 08] Power to the People: Leveraging Human Physiological Traits to Control Microprocessor Frequency A. Shye, Yan Pan, B. Scholbrock, J. S. Miller, G. Memik, P. Dinda, R. Dick Int'l Symp. on Microarchitecture (MICRO), Lake Como, Italy, Nov. 2008. (acceptance rate: 40/210 = 19.0%) Nominated for Best Paper Award - Top 8 papers selected by program committee [FPL 08] Towards an 'Early Neural Circuit Simulator': A FPGA Impl. of Processing in the Rat Whisker System B. Leung, Yan Pan, C. Schroeder, S. Memik, G. Memik, MJZ Hartmann Int'l Conf. on Field Programmable Logic and Applications (FPL), Heidelberg, Germany, Sept. 2008. (full paper acceptance rate: 69/247 = 27.9%) [TENCON 06] Functional Unit Selection in Superscalar Microprocessors for Low Power Yan Pan, Teng Tiow Tay TENCON '06, Hongkong, China, Nov. 2006. [IFIPVLSI 05] Time Domain Constraints on Switching with Gated-GND Cache Structures for Static Power Reduction Yan Pan, Teng Tiow Tay IFIP VLSI-SOC '05, Perth, Australia, Oct. 2005. [JSEKE 05] HW/SW Co-Design for Low Power ALUs by Exploiting Slack in Instruction Interdependence Tengtiow Tay, Karsin Ng, Yan Pan Int. Jrnl. of Software Engineering & Knowledge Engineering. Vol. 15, No. 2 (Aprl 2005) |
|||
 | ||||
 |
Mailing Address: |
Office Phone: +1 (847) 467-4610 Office Fax: +1 (847) 467-4144 Email:   |
Currently |
|
|
|
||||
![[Room Location]](images/techl458.png){kind=link}