Department of Electrical Eng. and Computer Science

Northwestern University



Also affiliated with

Center for Ultra Scale Computing and Information Security (CUCIS) and

Center for Engineering and Health










Tech Building, L475 (map to office)

Dept. of EECS
2145 Sheridan Road

Evanston, IL 60208-3118
Phone: (847) 467-1168

Fax: (847) 467-4144


Tech Building, L458

Phone: (847) 467-4610


Research Interest: Computer Architecture/Microarchitecture

My research is on understanding the effects of applications, users, and underlying technologies on architectures and vice versa.


These efforts include incorporating holistic effects into architecture design process (for example, investigating the impact of architectures on users, utilizing biological information to make architectural decisions, estimating profitability of a design); application-specific processors (for example, architectures and compilers for networking, security, and data mining); and physical-aware architectures (architectures for minimizing the power consumption, reducing operating temperatures, and mitigating the effects of process variations).


More information about my current/past project can be found here and on publications (Full list of publications).


Graduate Students Advised/Co-advised

Majed Valad Beigi, PhD

Emre Cicek, MS

Begum Birsen Egilmez, PhD

Emirhan Poyraz, PhD

Kaicheng Zhang*, PhD


*co-advised with Prof. Ogrenci-Memik




- Matt Schuchhardt, 2015

Thesis title: User-Aware System Design and Optimization. Position: 4C

- Benjamin Scholbrock, 2013

Thesis title: User-Centric Computer System Analysis. Position: Intel

- Prabhat Kumar (co-advised with Prof. A. Choudhary), 2012

Thesis title: High Performance Data Mining on Heterogeneous Platforms. Position: NVidia

- Pan Yan, 2011

Thesis title: Leveraging Nanophotonics in Future Many-core Processors. Position: Technology Department at Globalfoundries

- Abhishek Das (co-advised with Prof. A. Choudhary), 2010

Thesis title: Microarchitectural Approaches for Optimizing Power and Profitability in Multicore Processors. Position: Intel

- Alex Shye, 2010

Thesis title: Incorporating the End User in Computer Design and Optimization. Position: Qualcomm Research, Bay Area R&D.

- Yu Zhang, 2010

Thesis title: Adaptive On-Chip Networks and Their Impact on Processor Architectures. Position: Research and Development Department, Bloomberg L.P.

- Serkan Ozdemir, 2009

Thesis Title: Mitigating the Effects of Process Variations through Microarchitectural Techniques. Position: Intel Barcelona Research Center

- Berkin Ozisikyilmaz (co-advised with Prof. A. Choudhary), 2009

Thesis title: Analysis, Characterization and Design of Data Mining Applications and Applications to Computer Architecture. Position: NetApp

- Arindam Mallik, 2008

Thesis Title: Holistic Computer Architectures based on Application, User, and Process Characteristics. Position: IMEC



- Bhargavraj Patel (co-advised with Prof. N. Hardavellas),2013

Thesis Title: Exploring Compressed Cache to Implement Efficient Hardware Prefetcher for Multicore Processors

- Emre Karaman, 2012

Thesis Title: GPU Implementation of Action Potential Cardiac Computer Simulations

- Anitha Mohan (co-advised with Prof. S. O. Memik), 2010

Thesis Title: Yield improvement using cache SRAM array supply lowering and selective wordline voltage boosting mechanisms

- Matthew Erler (co-advised with Prof. Y. Ismail), 2007

Thesis Title: TAP Cache: Temperature-Aware Placement for Caches

- David Nguyen, 2005

Thesis Title: Reconfigurable Architectures For Network Intrusion Detection