Fixed-Point Blockset

Generating Pure Integer Code

All blocks generate pure integer code except for the Gateway In, Gateway In Inherited, and Gateway Out blocks. These blocks must generate floating-point code when handling floating-point input or output. However, if the input or output is an integer and the block is configured to treat the input or output as a stored integer, then these blocks will also generate pure integer code.

Example: Generating Pure Integer Code

This example outlines the steps you should take when generating pure integer code for your Fixed-Point Blockset model. The steps follow the description in the fxpdemo_code_only demo, which includes the model shown below.

Note    This example generates code using the Embedded C Real-Time Target (ERT), which is available with Real-Time Workshop Production Coder. If your version of Real-Time Workshop does not support ERT code generation, then you may want to select the Generic Real-Time Target (GRT). Using GRT, all Fixed-Point Blockset blocks (except the gateway blocks) will generate pure integer code. However, the code related to the GRT infrastructure is not generated to exclude floating-point operations. For example, GRT may decide when to execute blocks based on a floating-point counter.

1. Copy the fixed-point portion of your model to a new model.

1. If your original model includes blocks that represent hardware, analog systems, and other blocks not related to embedded software, then you must create a new model. This new model contains only the fixed-point portion, which represents the software that will be running on the fixed-point processor. For example, the digital controller subsystem shown above contains the fixed-point blocks from the fxpdemo_feedback model used for code generation.

2. Add root-level Inport and Outport blocks.
1. Precede the blocks in your new model with root-level Inport blocks, and configure the Inport blocks to use the appropriate data type and scaling. For example, the Inport block shown above is configured to use the sfix(8) data type and to have an output scaling of 2^-4.
2. Follow the blocks in your new model with root-level Outport blocks.
3. Configure the simulation parameters.
1. Open the Simulink Simulation Parameters dialog box by selecting Simulation parameters under the Simulation menu.
2. In the Solver window, configure Solver options to Fixed-step and discrete (no continuous states), and configure Fixed step size to the required value. The Solver window for this configuration is shown below.

3. Select the Real-Time Workshop tab in the Simulation Parameters dialog box. Select the Browse button in the Configuration panel to open the System Target File Browser window. If it is available, select RTW Embedded Coder as the system target file as shown below, and click OK. Note that you may not have ERT code generation capability. If this is the case, you should select the Generic Real-Time Target.

The Real-Time Workshop pane now appears as shown below.

4. To configure the code generation parameters, select ERT code generation options (1) from the Category parameter drop-down menu. Select the Integer code only check box and any other options that you require. The ERT code generation options for this configuration are shown below. If you are using GRT, the dialog box choices are slightly different.

5. Select ERT code generation options (2) from the Category parameter drop-down menu. Select the Initialize floats and doubles to 0.0 check box and any other options that you require, as shown below.

6. Select General code generation options from the Category parameter drop-down menu. Select the Generate HTML report check box and any other options that you require, as shown below.

7. Build the code by selecting the Generate code button.

Code Generation Support

HTML Report