"DIVA: A Dynamic Approach to Microprocessor Verification"

Todd Austin, University of Michigan

ABSTRACT:

Building a high-performance microprocessor presents many reliability challenges. Designers must verify the correctness of large complex systems and construct implementations that work reliably in varied (and occasionally adverse) operating conditions. Failure to meet these challenges can result in serious repercussions, ranging from disgruntled users to financial damage to loss of life. To further complicate this task, deep submicron fabrication technologies (below 0.25 micrometers) present new reliability challenges in the form of degraded signal quality and logic failures (caused by natural radiation interference).

In this talk, I'll introduce dynamic verification, a novel computer architecture design technique that could significantly reduce the burden of verification for future microprocessor designs. The approach works by augmenting the retirement phase of a modern microprocessor pipeline with simple functional checking circuitry. The checker circuitry verifies the integrity of program computation as the microprocessor is running, only permitting correct results to retire to program-visible registers and memory.

During the talk, I'll present the design and evaluation of the DIVA checker, and highlight the three primary benefits to microprocessors that employ it. First, the DIVA checker is the only core processor component that must be completely correct, any design errors that find their way into the remainder of the microprocessor cannot impair correct program function. Second, an electrically robust DIVA checker permits a processor to detect and correct all transient errors caused by natural radiation interference, such as alpha or gamma particle strikes. Finally, the fault tolerance afforded by the DIVA checker permits the application of extremely aggressive circuit technologies, technologies previously deemed too exotic or too unreliable for traditional microprocessor implementations. For example, it becomes possible to eliminate all voltage and timing margins (overclocking) in the core processor, yielding faster and cooler designs.


BIO:

Todd Austin is an Assistant Professor of Computer Science and Engineering at the University of Michigan in Ann Arbor. His research interests include computer architecture, compilers, computer system verification, and performance analysis tools and techniques. Prior to joining academia, Todd was a Senior Computer Architect in Intel's Microcomputer Research Labs, a product-oriented research laboratory in Hillsboro, Oregon. Todd received his Ph.D. in Computer Science from the University of Wisconsin in 1996.