<!DOCTYPE HTML PUBLIC "-//IETF//DTD HTML 2.0//EN"><!--Converted with LaTeX2HTML 96.1-h (September 30, 1996) by Nikos Drakos (nikos@cbl.leeds.ac.uk), CBLU, University of Leeds -->CCOCOURSE TITLE: ECE 357 Introduction to VLSI CAD

 

CATALOG DESCRIPTION: VLSI physical design, including logic design, architectural design, and packaging. Development of CAD tools for VLSI physical design. 

 

REQUIRED TEXT:  S. M. Sait and H. Youssef, VLSI Physical Design Automation: Theory and Practice, World Scientific, 1999.

 

REFERENCE TEXTS:  None.

 

COURSE COORDINATOR: Hai Zhou

 

COURSE GOALS: To teach basic concepts in VLSI CAD with emphasis on physical design. To teach various fundamental algorithms and methodologies used in VLSI CAD. To introduce technology and challenges facing the industry today and in the next ten years.

 

PREREQUISITES: ECE 303 and CS 311.

 

DETAILED COURSE TOPICS:

Week 1: Introduction: modern VLSI design flow; CAD paradigms; Algorithms 101 (correctness, performance, complexity).

Week 2-3: Partitioning: hypergraph vs. graph modeling; Kernighan-Lin Heuristic; network flow based approaches.

Week 4-5: Floorplanning: slicing floorplan sizing; topology optimization by simulated annealing; analytical methods.

Week 6: Placement: objective functions; partitioning based placement.

Week 7: Global routing: geometric spanning trees; Steiner trees; net ordering.

Week 8: Detailed Routing: shortest paths and maze search.

Week 9: Channel routing.

Week 10: Layout compaction and design rule checking.

 

COMPUTER USAGE: Computer usage in this course is light. Some homework may involve programming tasks. A term project may be a theoretical work or an experimental work up to a student’s selection.

 

LABORATORY: ECE Department Workstation Lab. Accounts will be arranged. The labs consist of a collection of high-speed workstations and Mentor Graphics CAD tools for physical design (placement and routing).

 

GRADES:

Homework  - 30%

Project - 30%

Exam - 30%

Class participations - 10%

 

COURSE OBJECTIVES:

 

  1. Understand the general design process of modern VLSI chips.
  2. Be able to identify and formulate design problems within a sound methodology.
  3. Increase ability to analysis a problem, and design efficient algorithms to solve it.
  4. Become familiar with most algorithms and methods used in VLSI CAD.
  5. Be able to implement algorithms in CAD tools.

 

ABET CONTENT CATEGORY:  100% Engineering (Design component).