Circuit tuning is an important task in the design of integrated circuits. The goal is to optimally choose sizes of transistors in order to minimize the time required for the slowest signal to pass through a circuit consisting of gates which are connected by wires. Nonlinear functions describing the delay in each gate are obtained by an event-driven time-domain simulator.

We will discuss how the arising nonlinear optimization problem can be solved using a primal-dual interior point algorithm for large-scale nonlinear programming (IPOPT). Special attention has to be paid to the problem characteristics, such as numerical noise, unavailability of second derivatives, and high cost of function evaluations. Also, a new algorithm for the feasibility restoration phase in the filter line search approach of the optimization method will be proposed. Numerical results on a set of benchmark tuning problems will be presented and compared with the current approach.