Simulink Reference    

Model Verification

Acknowledgement.   The Model Verification blocks were developed in conjunction with the Control System Design team of the Advanced Chassis SystemDevelopment group of DaimlerChrysler AG, Stuttgart, Germany.

The Model Verification library contains blocks that enable you to create self-validating models.

Block Name
Purpose
Assertion
Assert that the input signal is nonzero.
Check Discrete Gradient
Check that the absolute value of the difference between successive samples of a discrete signal is less than an upper bound.
Check Dynamic Gap
Check that a gap of varying width occurs in the range of a signal's amplitudes.
Check Dynamic Lower Bound
Check that a signal is always greater than a value that can vary at each time step.
Check Dynamic Range
Check that a signal alway lies in a varying range of amplitudes.
Check Dynamic Upper Bound
Check that a signal is always less than a value that can vary at each time step.
Check Input Resolution
Check that a signal has a specified resolution.
Check Static Gap
Check that a fixed-width gap occurs in the range of a signal's amplitudes
Check Static Lower Bound
Check that a signal is greater than (or optionally equal to) a lower bound that does not vary with time.
Check Static Range
Check that the input signal falls in a fixed range of amplitudes.
Check Static Upper Bound
Check that a signal is less than (or optionally equal to) an upper bound that does not vary with time.


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